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Design and Verification of 16 bit RISC Processor Using Vedic Mathematics


Design of IoT based smart compact energy meter for monitoring and controlling the usage of energy and power quality issues with demand side management for a commercial building


Design and Verification of 16 bit RISC Processor Using Vedic Mathematics



Design of IoT based smart compact energy meter for monitoring and controlling the usage of energy and power quality issues with demand side management for a commercial building



The New Analysis of Discrete Element Method Using ARM Processor



Design and implementation of VLIW DSP processors for high ended embedded based systems



Design and Implementation of Arbitrary Point FFT Based on RISC-V SoC



A CORDIC-based Trigonometric Hardware Accelerator with Custom Instruction in 32-bit RISC-V System-on-Chip



Design of sports course management system based on multi-core embedded system and motion capture



Network of Smart Tip-Timing Sensors in Distributed Blade Health Monitoring System



RF-RISA: A novel flexible random forest accelerator based on FPGA



Reduced Instruction Set Computer Design on FPGA



A Reduced Architecture for ReRAM-Based Neural Network Accelerator and Its Software Stack



System Verification and Analysis of ALU for RISC Processor



Analysis of 16-Bit and 32-Bit RISC Processors



A natively flexible 32-bit Arm microprocessor.



Lightweight Microcontroller with Parallelized ECC-Based Code Memory Protection Unit for Robust Instruction Execution in Smart Sensors



The Influence of Robot-Assisted Learning System on Health Literacy and Learning Perception



ASIF: An Internal Representation Suitable for Program Transformation and Parallel Conversion



RISC-V CNN Coprocessor for Real-Time Epilepsy Detection in Wearable Application


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Reduced Instruction 减少指令


Reduced Instruction 减少指令
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