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Machine Learning-Based Detection Method for Wafer Test Induced Defects


Semiconductor Manufacturing Final Test Yield Optimization and Wafer Acceptance Test Parameter Inverse Design Using Multi-Objective Optimization Algorithms


Machine Learning-Based Detection Method for Wafer Test Induced Defects



Semiconductor Manufacturing Final Test Yield Optimization and Wafer Acceptance Test Parameter Inverse Design Using Multi-Objective Optimization Algorithms



A Machine Learning-based Approach for Failure Prediction at Cell Level based on Wafer Acceptance Test Parameters



A Gaussian Mixture Model Clustering Ensemble Regressor for Semiconductor Manufacturing Final Test Yield Prediction



An Analytical Model for the Effective Drive Current in CMOS Circuits



Accurate and Fast On-Wafer Test Circuitry for Device Array Characterization in Wafer Acceptance Test



Wafer Probe Yield Prediction Modeling based on General Regression Neural Network to Improve DRAM Processes



CLASSIFICATION AND PREDICTION OF WAFER PROBE YIELD IN DRAM MANUFACTURING USING MAHALANOBIS-TAGUCHI SYSTEM AND NEURAL NETWORK



The Competing Aging Effects on SRAM Operating Life Tests



Characterization of Micro-Bumps for 3DIC Wafer Acceptance Tests


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