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In addition, a diode-capacitor voltage-clamp cell is employed to eliminate the voltage oscillation caused by resonance between parasitic capacitance and the leakage inductance.

However, the voltage ripple occurs to the submodule capacitor voltage in normal operation, which makes the loss increasing.

The simplified SVPWM provides effective capacitor voltage balancing even under extreme faults.

Especially, Mode 1 has the highest coupling coefficient, the largest critical current, the highest energy storage capacity, the lowest capacitor voltage, and the shortest current rise time.

In this letter, a new control method based on the sinusoidal pulsewidth modulation scheme is proposed to control capacitor voltages of a T-type four-level nested neutral-point-clamped (NNPC) inverter.

This paper presents two capacitor voltage balancing (CVB) strategies for modular multilevel converter (MMC) applications.

A cascaded structure of the proposed control method is employed, which consists of two control loops, the dc-link capacitor voltage regulation loop (outer loop) and the grid phase current tracking loop (inner loop).

Compared to the conventional PWM strategy for the same input and output voltage gain, the introduced PWM strategies for qSBI could reduce voltage stress across semiconductors and capacitor with the following additional merits: having smaller high-frequency inductor current and capacitor voltage ripples, using high modulation index with low ST duty cycle, and having higher efficiency.

Whereas, the inherent unbalanced dc capacitor voltages in ac/dc converter and the low efficiency of power transmission through dc/dc converters will lead to the increase of switching device stress and system loss.

This paper proposed a reference submodule (RSM)-based capacitor monitoring strategy for the capacitance estimation in the MMC, where the capacitances in the monitoring SMs can be estimated based on the capacitor voltage relationship between the RSM and the monitoring SMs.